TSMC has begun operating its first Chip-on-Panel-on-Substrate, or CoPoS, production line at the AP7 advanced packaging site in Chiayi, Taiwan, marking an early step toward commercializing a glass-based packaging approach designed for larger AI chips. The line has entered core testing and commercialization verification on a 310mm x 310mm panel, and the company is expected to need about one year to stabilize the technology and yields. CoPoS is intended to ease supply constraints in TSMC's mainstream CoWoS packaging while enabling ultra-large AI processors. Unlike CoWoS, which uses a circular silicon wafer interposer, CoPoS uses a rectangular glass substrate that resists heat deformation, reduces wasted area and could lower costs, though glass fragility and processing complexity remain hurdles. The move comes as advanced packaging becomes a central battleground in semiconductors. Morgan Stanley recently said CoPoS mass production could start as early as 2028, earlier than the industry's prior expectation of 2028 to 2029. Intel is also preparing its EMIB-T packaging technology for 2027 mass production, with the report saying it could be up to 50% cheaper than CoWoS. At the same time, Tesla and SpaceX have outlined a $16.8 billion first-phase investment in Terafab, a planned chip factory in Grimes County, Texas, that would combine manufacturing, packaging and testing. South Korean groups including Samsung Electronics, Samsung Electro-Mechanics, SK Absolics and LG Innotek are also advancing glass-substrate plans. As demand rises, TSMC is pursuing factory conversions to secure capacity, and industry observers expect a potential AUO deal worth more than 30 billion Taiwan dollars, after TSMC bought an Innolux plant in 2024 at a 20% premium to market expectations.