TSMC (2330.TW) said its CoWoS advanced packaging capacity has doubled for three straight years and is now "very close" to meeting market demand, but the main supply constraint is moving from memory to ABF substrates. Speaking at the OCP APAC Summit on the 11th, Vice President of Advanced Packaging Technology and Services He Jun said the larger size and rising complexity of AI accelerators are lifting demand for ABF substrates, which could become the second most critical limit on AI chip expansion in the coming years after memory. He said 5.5x reticle size CoWoS is already in high-volume production with yields above 98% across multiple AI customer products and as high as 99% in some cases, while TSMC plans to introduce new CoWoS technology every year and extend packaging dimensions to 14x reticle size by 2029. He also said SoIC (System on Integrated Chips, a 3D chip stacking technology) has entered a high-growth phase, with capacity projected to rise at a compound annual growth rate of more than 90% from 2022 to 2027, compared with more than 80% for CoWoS over the same period. TSMC is already mass producing 6-micron hybrid bonding and aims to shrink that to 4.5 microns by 2029 for direct A14 logic-on-A14 logic stacking. He said tighter die-to-die links can sharply improve interconnect density and power efficiency, which matters as AI system power use increasingly comes from moving data between chips rather than only on-chip computation. He added that sustaining progress in AI packaging will depend on System Technology Co-Optimization, or STCO (co-design across chip, package and system), faster verification and closer coordination across the chip, packaging, materials, equipment and system integration ecosystem.