AI infrastructure constraints are shifting from GPUs and HBM toward the networking layer needed to connect thousands to tens of thousands of chips, according to a Samil PwC report released on the 13th and a separate co-packaged optics market study added by ResearchAndMarkets.com. Both reports say copper-based electrical links and conventional pluggable optics face growing power, distance, density and cost limits in AI data centres, increasing the strategic importance of optical communications. Samil PwC describes a transition from rack-to-rack optical fibre links to Co-Packaged Optics, or CPO, and eventually optical GPU chip-to-chip interfaces, while the ResearchAndMarkets study frames CPO as a key interconnect architecture for both scale-out network switches and scale-up GPU and AI-accelerator optical I/O. Samil PwC said CPO has entered early commercialization and cited a market forecast of 38% compound annual growth to $580 million by 2030, while the newer market study says broader adoption will depend on solving manufacturing-test yield, field reliability, serviceability and qualification challenges, with large-scale NVIDIA CPO production potentially shifting to 2028-2029. Both reports cite industry moves by NVIDIA, TSMC and others, and Samil PwC says the shift could create openings for South Korean companies in optical cables, transceivers and longer-term silicon photonics and high-speed interconnect technologies.