Nvidia is pressing ahead with Feynman, its next GPU microarchitecture, for a targeted 2028 release on TSMC's A16 process, a 1.6-nanometer, 2nm-class node that was fully booked through 2028 as of March 2026. CEO Jensen Huang first unveiled Feynman at GTC 2025, and additional details presented at GTC 2026 in March showed a platform designed to follow Rubin and pair with a new CPU called Rosa after the current Vera architecture. The chip line is expected to use 3D die-stacking, custom high-bandwidth memory and backside power delivery, which shifts power routing to the back of the chip to free front-side space for data pathways and improve performance and energy efficiency. Earlier supply-chain reporting also pointed to SoIC-based 3D chiplets, co-packaged optics and NVLink bandwidth above 1,000 terabytes per second, or 1 petabyte per second, as Nvidia builds larger AI clusters. Tight A16 availability is forcing new manufacturing trade-offs, with Nvidia reportedly weighing design changes to some Feynman components while using existing Blackwell GPU technology to speed design and verification. TSMC plans to lift A16 output to 20,000 wafers a month by the end of 2027 while also expanding advanced packaging capacity.