Samsung Electronics is pursuing several related semiconductor programs for AI infrastructure: an eight-layer HBM4E chip for Nvidia, the more-than-400-layer V10 BV-NAND strategy, and its CUBE architecture for future HBM5, zHBM and zNAND-O products. HBM4E targets 17 to 18Gbps transfer speeds for Nvidia’s custom NVHBM platform but remains subject to yield, power-management and customer validation. Samsung said V10 delivers 58% higher bit density, 33% faster I/O and 25% lower power consumption, supporting 128TB-class and PCIe 7.0 SSDs. Separately, CUBE targets HBM5 performance double that of HBM4E, thermal resistance of 75% to 90% of existing HBM levels and zHBM performance eight times higher than HBM5; Samsung plans its first zNAND-O prototype test in 2028.