TSMC is planning a major expansion of advanced semiconductor capacity to meet sustained demand for artificial-intelligence and high-performance-computing chips. The company has communicated its 2027 plans to partner suppliers, targeting monthly 2nm capacity of 110,000 wafers by mid-2027, up about 22% from 90,000 wafers at the end of 2026, and 3nm capacity of 210,000 wafers, up more than 16% from 180,000. Compared with the approximately 120,000 to 130,000 wafers produced monthly at the end of 2025, the 3nm target represents nearly 70% growth over 18 months. TSMC is adding or converting 3nm capacity in Taiwan, Arizona and Japan, while converting some 5nm equipment in Taiwan. It has raised 2026 capital spending to $60 billion-$64 billion, with 70% to 80% earmarked for N3 and N2 capacity, and is considering doubling CoWoS advanced-packaging capacity to 260,000 wafers a month by the end of 2028. TSMC said AI-related demand visibility extends through 2029 and 2030. Its N2 process is expected to begin contributing revenue in the second quarter of 2026, A16 is scheduled for volume production in the second half of 2026, and A14 is targeted for volume production in the third quarter of 2028. Intel is also expanding EMIB-T packaging, but TSMC's CoWoS remains a key link for AI chipmakers including Nvidia.