TSMC says CoPoS trial line is running, output to rise in 2-3 years

The CEO said the company is scaling advanced packaging while adding mature-process wafer capacity in Japan and Germany to serve image sensor, automotive and industrial demand.

Summary

TSMC’s CEO said the company’s CoPoS advanced packaging technology is already operating on a trial production line, with output expected to increase significantly over the next two to three years. He also said TSMC is expanding mature-process wafer capacity in Japan for CMOS image sensors and in Germany for automotive and industrial demand, while steering clear of sharp price increases. The remarks point to a two-track manufacturing strategy: building out cutting-edge packaging used to integrate high-performance chips, while also reinforcing older-node capacity that remains important for sensors, vehicles and industrial applications.

Terms & Concepts
  • CoPoS: Advanced chip packaging technology.
  • advanced packaging: Methods for combining chips into higher-performance systems.
  • CMOS image sensors: Semiconductor sensors used in cameras and imaging devices.