SemiAnalysis said JEDEC’s JESD330-4 standard keeps HBM4 DRAM-stack performance with a different buffer chip, potentially reducing reliance on costly silicon interposer-plus-ABF packaging and accelerating interest in glass substrates.
JEDEC announced the SPHBM4 standard, formally JESD330-4, for standard-package high-bandwidth memory, and SemiAnalysis said the design could redirect AI chip packaging demand toward the substrate layer. According to SemiAnalysis, SPHBM4 uses the same DRAM stack as HBM4 but a different buffer chip to preserve HBM4 performance while reducing dependence on expensive advanced packaging. The firm said chipmakers may move away from proprietary silicon interposer-plus-ABF packages and instead buy ultra-large, high-layer-count ABF substrates, with glass substrates potentially adopted earlier if performance demands shift further onto the substrate.