The Hefei project uses wafer bonding to pursue high-density DRAM without EUV lithography, as CXMT expands capacity, targets HBM3 output by end-2026 and prepares for a STAR Market IPO.
ChangXin Memory Technologies is testing a bonded DRAM pilot line at its Hefei facility, using wafer-to-wafer hybrid bonding to build high-density memory chips without relying on extreme ultraviolet lithography. The approach separates memory cell arrays from peripheral circuitry, fabricates them on different wafers and bonds them together, offering a potential route to high-performance DRAM on older lithography equipment at a time when Chinese chipmakers remain blocked from buying ASML’s export-restricted EUV machines. South Korean media first reported the pilot line around July 5, 2026. Samsung is pursuing a similar bonded DRAM effort through its B1b project, while SK hynix has also been exploring bonded architectures, and some Korean analysts say CXMT could gain an edge if it commercializes the technology first. Founded in 2016 with significant state backing, CXMT has moved from 19 nm DDR4 and LPDDR4 into DDR5, operates several 12-inch DRAM fabs and has been expanding capacity as demand for DRAM strengthened through 2025 and 2026. The company is also targeting HBM3 output by the end of 2026 and preparing for an initial public offering on Shanghai’s STAR Market. No yield data or production timetable has been disclosed for the bonded DRAM line, suggesting the project remains at an early stage, but successful commercialization could intensify competition, pressure DRAM pricing and strengthen China’s domestic memory supply chain.