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Memory-chip makers shift CXL controller development to external designers

Micron adopted Primemas’s CXL 3.0 controller, SK hynix redirected engineers to processing-in-memory, and Samsung kept its project for internal testing while planning commercial outsourcing.

Summary

Major memory-chip makers are retreating from in-house Compute Express Link controller commercialization and leaning more heavily on external suppliers as adoption timelines for the technology slip. Micron fully halted its internal CXL controller R&D and adopted a CXL 3.0 controller from Primemas, while SK hynix terminated its project and reassigned engineers to processing-in-memory research. Samsung Electronics is keeping its controller work alive for internal experimentation but plans to source commercial controllers through outside partnerships. The shift comes as expected CXL 3.x volume ramp has moved to 2027 and 2028 after ecosystem production delays, even though Samsung, Micron and SK hynix had collectively committed more than $12 billion to CXL-related development through 2027.

Terms & Concepts
  • Compute Express Link: An open interconnect standard that allows processors and memory resources to be linked and shared more efficiently.
  • CXL 3.0 controller: Specialized silicon that manages data movement and memory expansion functions in systems using the CXL standard.
  • processing-in-memory: A chip architecture approach that places computing functions inside memory to reduce data movement and improve efficiency.