Back
SemiAnalysis report says Nvidia cut Rubin Ultra specs as HBM costs climb

SemiAnalysis report says Nvidia cut Rubin Ultra specs as HBM costs climb

TrendForce adds that DRAM shortages may persist through 2027, leaving Nvidia and some cloud providers weighing lower HBM configurations for next-generation AI chips.

Fact Check
Both components of the claim are corroborated by strong sources. The SemiAnalysis attribution for the Rubin Ultra spec cut (HBM reduced to 192GB, driven by rising HBM costs and power constraints) is reported consistently across Odaily and BlockBeats, and is thematically consistent with SemiAnalysis's own memory coverage. TrendForce's own research page 'Rubin Ultra HBM Specs in Flux as Supply Tightens' directly confirms Nvidia is weighing lower HBM configurations due to tight DRAM supply, and TechTimes (citing TrendForce's July 30 outlook) confirms the DRAM shortage persists through 2027. The note that some cloud providers (CSPs) are also considering lower HBM capacity for custom ASICs is explicitly stated in the Odaily newsflash citing TrendForce. Note the exact 'starting' HBM figure varies between reports (288GB Rubin baseline vs 384GB HBM4E 12Hi original Rubin Ultra plan), but the direction and cause of the change are firmly supported.
Summary

Nvidia's reported rethink of Rubin Ultra's memory configuration is gaining a supply-side explanation as TrendForce says DRAM shortages are expected to last through 2027 and HBM4e certification timing remains uncertain. The memory market research adds to earlier SemiAnalysis claims that Rubin Ultra has been scaled back, saying Nvidia has been reassessing the platform's HBM setup since early in the third quarter of 2026 after initially using 12-layer HBM4e as the baseline design through 2025 and the first half of 2026. TrendForce said Nvidia is now evaluating several parallel options for Rubin Ultra, including HBM4e 8-Hi, HBM4 12-Hi and HBM4 8-Hi, with the final specification still undecided. The firm said the main constraint is not demand but supply: wafer capacity available for HBM is expected to stay tight because of a broader DRAM shortage, while 12-layer HBM4e still faces uncertainty over certification and yield ramping. TrendForce added that some cloud service providers are also considering reducing HBM capacity in next-generation in-house ASICs. The report said Nvidia's top priority for the Rubin Ultra generation is raising I/O speed, with expanding GPU shipments a secondary objective. If Nvidia lowers the HBM specification, TrendForce expects that to happen by reducing the number of DRAM stack layers. Whether HBM4e reaches certification and mass production on schedule will determine whether Rubin Ultra can lift I/O speeds to 14-16Gbps from Rubin's 8-11.7Gbps, or instead stay closer to 11-12Gbps through an optimized HBM4 design. That trade-off is central because stack height affects both per-GPU memory capacity and the number of GPUs that can be shipped under constrained supply. TrendForce expects 2027 HBM bit shipments to grow 50% to 60% from a year earlier but still lag demand, leaving suppliers with pricing power throughout the year. That outlook reinforces the earlier argument that Nvidia's Rubin Ultra changes reflect a broader shift in AI infrastructure design toward balancing memory, power and interconnect rather than simply maximizing chip-level specifications.

Terms & Concepts
  • HBM4e: An enhanced version of high-bandwidth memory whose certification, yields and stack design can affect AI chip speed and capacity.
  • 8-Hi: A memory stack with eight DRAM layers, used as a way to describe HBM capacity and packaging configuration.
  • I/O speed: The data transfer rate between memory and a processor, a key performance metric for AI accelerators.