Olix Computing closes $312 million Series B at $3.3 billion

The London startup says its optical interconnect architecture can ease AI inference memory bottlenecks and avoid HBM supply constraints as it targets first deliveries in the second half of 2027.

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Summary

Olix Computing, a London-based AI chip startup, has raised a $312 million Series B at a $3.3 billion valuation in what it described as the largest semiconductor venture capital round raised by a European company. The round was led by Fundomo and included Arm, Hudson River Trading, Reed Hastings and the UK government's Sovereign AI Fund, while existing investors Hummingbird Ventures, Crane, Plural, Creandum, Phoenix Court and Transition increased their stakes. Matt Briers also joined as CFO. Founded in March 2024 as Flux Corp Ltd. and rebranded as Olix Computing Ltd. in January 2026, the company is building the X-1 platform and its first chip, the DX-1, to accelerate the decode stage of AI inference. Olix argues that decode is constrained less by arithmetic throughput than by memory bandwidth, and says its design spreads model execution across many specialized chips linked by a slow-and-wide optical die-to-die interconnect. By keeping each chip's working set in on-chip SRAM rather than high-bandwidth memory, or HBM, Olix is positioning itself as less exposed to the supply bottlenecks tied to HBM and advanced CoWoS packaging. Olix says DX-1 can deliver more than 10,000 tokens per second per user for models with 100 billion parameters, while scaling to models of 10 trillion parameters and above through a multi-rack design. These are company claims, and the chip has not yet shipped to paying customers. Tape-out is expected later in 2026, with first delivery targeted for the second half of 2027. The company was founded by James Dacombe, who is also CEO of CoMind, and has added Professor Nick McKeown to its board. The raise comes as private capital continues to flow into AI infrastructure despite weaker public chip-market sentiment. Olix remains early-stage and pre-revenue, and its commercial test will hinge on whether its photonic interconnect approach can be manufactured at scale and perform as promised in production systems.

Terms & Concepts
  • AI inference: The stage when a trained AI model generates outputs for users, such as producing text or other responses in real time.
  • HBM: High-bandwidth memory, a specialized memory used in AI chips that offers very fast data transfer but faces supply constraints.
  • tape-out: The final stage of chip design before a semiconductor is sent for manufacturing.